//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Fri Jul 25 04:36:16 2014 (1406288176)
// Cuda compilation tools, release 6.5, V6.5.13
//

.version 4.1
.target sm_30
.address_size 64

.global .texref texture0_RECT;
.global .texref texture2_2D;
// ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local has been demoted

.visible .entry ShaderKernel_PrColorBasicCorrection(
	.param .u64 ShaderKernel_PrColorBasicCorrection_param_0,
	.param .u32 ShaderKernel_PrColorBasicCorrection_param_1,
	.param .u32 ShaderKernel_PrColorBasicCorrection_param_2,
	.param .u32 ShaderKernel_PrColorBasicCorrection_param_3,
	.param .u32 ShaderKernel_PrColorBasicCorrection_param_4,
	.param .u64 ShaderKernel_PrColorBasicCorrection_param_5,
	.param .u64 ShaderKernel_PrColorBasicCorrection_param_6,
	.param .u64 ShaderKernel_PrColorBasicCorrection_param_7,
	.param .u64 ShaderKernel_PrColorBasicCorrection_param_8
)
{
	.reg .pred 	%p<30>;
	.reg .s16 	%rs<5>;
	.reg .s32 	%r<30>;
	.reg .f32 	%f<237>;
	.reg .s64 	%rd<25>;
	// demoted variable
	.shared .align 16 .b8 ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local[128];

	ld.param.u64 	%rd4, [ShaderKernel_PrColorBasicCorrection_param_0];
	ld.param.u32 	%r7, [ShaderKernel_PrColorBasicCorrection_param_1];
	ld.param.u32 	%r8, [ShaderKernel_PrColorBasicCorrection_param_2];
	ld.param.u32 	%r9, [ShaderKernel_PrColorBasicCorrection_param_3];
	ld.param.u32 	%r10, [ShaderKernel_PrColorBasicCorrection_param_4];
	ld.param.u64 	%rd5, [ShaderKernel_PrColorBasicCorrection_param_5];
	ld.param.u64 	%rd6, [ShaderKernel_PrColorBasicCorrection_param_8];
	mov.u32 	%r11, %ntid.x;
	mov.u32 	%r12, %ctaid.x;
	mov.u32 	%r1, %tid.x;
	mad.lo.s32 	%r2, %r11, %r12, %r1;
	mov.u32 	%r13, %ntid.y;
	mov.u32 	%r14, %ctaid.y;
	mov.u32 	%r15, %tid.y;
	mad.lo.s32 	%r3, %r13, %r14, %r15;
	setp.lt.s32	%p1, %r2, %r9;
	setp.lt.s32	%p2, %r3, %r10;
	and.pred  	%p3, %p1, %p2;
	@!%p3 bra 	BB0_28;
	bra.uni 	BB0_1;

BB0_1:
	setp.gt.u32	%p4, %r1, 7;
	@%p4 bra 	BB0_3;

	cvta.to.global.u64 	%rd7, %rd5;
	mul.wide.u32 	%rd8, %r1, 16;
	mov.u64 	%rd9, ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local;
	add.s64 	%rd10, %rd9, %rd8;
	add.s64 	%rd11, %rd7, %rd8;
	ld.global.v4.f32 	{%f71, %f72, %f73, %f74}, [%rd11];
	st.shared.v4.f32 	[%rd10], {%f71, %f72, %f73, %f74};

BB0_3:
	cvta.to.global.u64 	%rd1, %rd6;
	cvt.rn.f32.s32	%f79, %r2;
	add.ftz.f32 	%f1, %f79, 0f3F000000;
	cvt.rn.f32.s32	%f80, %r3;
	add.ftz.f32 	%f2, %f80, 0f3F000000;
	bar.sync 	0;
	// inline asm
	tex.2d.v4.f32.f32 {%f81, %f82, %f83, %f84}, [texture0_RECT, {%f1, %f2}];
	// inline asm
	ld.global.u32 	%r16, [%rd1+8];
	setp.eq.s32	%p5, %r16, 0;
	mov.f32 	%f234, %f83;
	mov.f32 	%f235, %f82;
	mov.f32 	%f236, %f81;
	@%p5 bra 	BB0_10;

	ld.global.u32 	%r17, [%rd1];
	setp.eq.s32	%p6, %r17, 0;
	@%p6 bra 	BB0_6;

	ld.shared.f32 	%f87, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local+96];
	mul.ftz.f32 	%f234, %f87, %f83;
	mul.ftz.f32 	%f235, %f87, %f82;
	mul.ftz.f32 	%f236, %f87, %f81;
	bra.uni 	BB0_10;

BB0_6:
	ld.shared.v4.f32 	{%f88, %f89, %f90, %f91}, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local+32];
	mul.ftz.f32 	%f93, %f82, %f89;
	fma.rn.ftz.f32 	%f95, %f83, %f88, %f93;
	fma.rn.ftz.f32 	%f13, %f81, %f90, %f95;
	setp.gtu.ftz.f32	%p7, %f13, 0f00000000;
	@%p7 bra 	BB0_8;

	mov.f32 	%f226, 0f3A000000;
	bra.uni 	BB0_9;

BB0_8:
	lg2.approx.ftz.f32 	%f98, %f13;
	mul.ftz.f32 	%f99, %f98, 0f3EE8BA2F;
	ex2.approx.ftz.f32 	%f100, %f99;
	fma.rn.ftz.f32 	%f226, %f100, 0f3F7FF000, 0f3A000000;

BB0_9:
	add.ftz.f32 	%f107, %f81, 0fBF800000;
	setp.lt.ftz.f32	%p8, %f107, 0f00000000;
	add.ftz.f32 	%f108, %f82, 0fBF800000;
	setp.lt.ftz.f32	%p9, %f108, 0f00000000;
	add.ftz.f32 	%f109, %f83, 0fBF800000;
	setp.lt.ftz.f32	%p10, %f109, 0f00000000;
	setp.lt.ftz.f32	%p11, %f81, 0f00000000;
	setp.lt.ftz.f32	%p12, %f82, 0f00000000;
	setp.lt.ftz.f32	%p13, %f83, 0f00000000;
	fma.rn.ftz.f32 	%f106, %f13, 0f00000000, 0f3F000000;
	// inline asm
	tex.2d.v4.f32.f32 {%f101, %f102, %f103, %f104}, [texture2_2D, {%f226, %f106}];
	// inline asm
	fma.rn.ftz.f32 	%f110, %f101, %f83, %f102;
	fma.rn.ftz.f32 	%f111, %f101, %f82, %f102;
	fma.rn.ftz.f32 	%f112, %f101, %f81, %f102;
	ld.shared.v2.f32 	{%f113, %f114}, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local+48];
	fma.rn.ftz.f32 	%f117, %f113, %f83, %f114;
	fma.rn.ftz.f32 	%f118, %f113, %f82, %f114;
	fma.rn.ftz.f32 	%f119, %f113, %f81, %f114;
	ld.shared.v2.f32 	{%f120, %f121}, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local+64];
	fma.rn.ftz.f32 	%f124, %f120, %f83, %f121;
	fma.rn.ftz.f32 	%f125, %f120, %f82, %f121;
	fma.rn.ftz.f32 	%f126, %f120, %f81, %f121;
	selp.f32	%f127, %f117, %f110, %p13;
	selp.f32	%f128, %f118, %f111, %p12;
	selp.f32	%f129, %f119, %f112, %p11;
	selp.f32	%f234, %f127, %f124, %p10;
	selp.f32	%f235, %f128, %f125, %p9;
	selp.f32	%f236, %f129, %f126, %p8;

BB0_10:
	ld.global.u32 	%r4, [%rd1+20];
	ld.global.u32 	%r5, [%rd1+12];
	or.b32  	%r18, %r4, %r5;
	setp.eq.s32	%p14, %r18, 0;
	@%p14 bra 	BB0_21;

	ld.global.u32 	%r6, [%rd1];
	setp.eq.s32	%p15, %r6, 0;
	ld.shared.v2.f32 	{%f131, %f132}, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local+80];
	mul.ftz.f32 	%f134, %f131, %f234;
	mul.ftz.f32 	%f135, %f131, %f235;
	mul.ftz.f32 	%f136, %f131, %f236;
	selp.f32	%f231, %f234, %f134, %p15;
	selp.f32	%f232, %f235, %f135, %p15;
	selp.f32	%f233, %f236, %f136, %p15;
	setp.eq.s32	%p16, %r4, 0;
	ld.shared.v2.f32 	{%f137, %f138}, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local+72];
	ld.shared.v2.f32 	{%f139, %f140}, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local+56];
	@%p16 bra 	BB0_13;

	add.ftz.f32 	%f141, %f231, 0fBF4CCCCD;
	mul.ftz.f32 	%f142, %f141, 0f40A00000;
	cvt.ftz.sat.f32.f32	%f227, %f142;
	add.ftz.f32 	%f143, %f232, 0fBF4CCCCD;
	mul.ftz.f32 	%f144, %f143, 0f40A00000;
	cvt.ftz.sat.f32.f32	%f228, %f144;
	add.ftz.f32 	%f145, %f233, 0fBF4CCCCD;
	mul.ftz.f32 	%f146, %f145, 0f40A00000;
	cvt.ftz.sat.f32.f32	%f229, %f146;

BB0_13:
	setp.eq.s32	%p17, %r5, 0;
	@%p17 bra 	BB0_18;

	ld.shared.v4.f32 	{%f147, %f148, %f149, %f150}, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local+32];
	mul.ftz.f32 	%f152, %f232, %f148;
	fma.rn.ftz.f32 	%f154, %f231, %f147, %f152;
	fma.rn.ftz.f32 	%f38, %f233, %f149, %f154;
	setp.gtu.ftz.f32	%p18, %f38, 0f00000000;
	@%p18 bra 	BB0_16;

	mov.f32 	%f230, 0f3A000000;
	bra.uni 	BB0_17;

BB0_16:
	lg2.approx.ftz.f32 	%f157, %f38;
	mul.ftz.f32 	%f158, %f157, 0f3EE8BA2F;
	ex2.approx.ftz.f32 	%f159, %f158;
	fma.rn.ftz.f32 	%f230, %f159, 0f3F7FF000, 0f3A000000;

BB0_17:
	add.ftz.f32 	%f166, %f231, 0fBF800000;
	add.ftz.f32 	%f167, %f232, 0fBF800000;
	add.ftz.f32 	%f168, %f233, 0fBF800000;
	fma.rn.ftz.f32 	%f165, %f38, 0f00000000, 0f3F000000;
	// inline asm
	tex.2d.v4.f32.f32 {%f160, %f161, %f162, %f163}, [texture2_2D, {%f230, %f165}];
	// inline asm
	fma.rn.ftz.f32 	%f169, %f162, %f231, %f163;
	fma.rn.ftz.f32 	%f170, %f162, %f232, %f163;
	fma.rn.ftz.f32 	%f171, %f162, %f233, %f163;
	fma.rn.ftz.f32 	%f172, %f139, %f231, %f140;
	fma.rn.ftz.f32 	%f173, %f139, %f232, %f140;
	fma.rn.ftz.f32 	%f174, %f139, %f233, %f140;
	fma.rn.ftz.f32 	%f175, %f137, %f231, %f138;
	fma.rn.ftz.f32 	%f176, %f137, %f232, %f138;
	fma.rn.ftz.f32 	%f177, %f137, %f233, %f138;
	setp.lt.ftz.f32	%p19, %f231, 0f00000000;
	selp.f32	%f178, %f172, %f169, %p19;
	setp.lt.ftz.f32	%p20, %f232, 0f00000000;
	selp.f32	%f179, %f173, %f170, %p20;
	setp.lt.ftz.f32	%p21, %f233, 0f00000000;
	selp.f32	%f180, %f174, %f171, %p21;
	setp.lt.ftz.f32	%p22, %f166, 0f00000000;
	selp.f32	%f231, %f178, %f175, %p22;
	setp.lt.ftz.f32	%p23, %f167, 0f00000000;
	selp.f32	%f232, %f179, %f176, %p23;
	setp.lt.ftz.f32	%p24, %f168, 0f00000000;
	selp.f32	%f233, %f180, %f177, %p24;

BB0_18:
	@%p16 bra 	BB0_20;

	fma.rn.ftz.f32 	%f181, %f227, 0f3DCCCCCD, 0f3F4CCCCD;
	fma.rn.ftz.f32 	%f182, %f228, 0f3DCCCCCD, 0f3F4CCCCD;
	fma.rn.ftz.f32 	%f183, %f229, 0f3DCCCCCD, 0f3F4CCCCD;
	add.ftz.f32 	%f184, %f137, %f138;
	mul.ftz.f32 	%f185, %f184, %f181;
	mul.ftz.f32 	%f186, %f184, %f182;
	mul.ftz.f32 	%f187, %f184, %f183;
	sub.ftz.f32 	%f188, %f231, %f185;
	sub.ftz.f32 	%f189, %f232, %f186;
	sub.ftz.f32 	%f190, %f233, %f187;
	ld.shared.f32 	%f191, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local+112];
	fma.rn.ftz.f32 	%f192, %f188, %f191, %f185;
	fma.rn.ftz.f32 	%f193, %f189, %f191, %f186;
	fma.rn.ftz.f32 	%f194, %f190, %f191, %f187;
	mov.f32 	%f195, 0f3F800000;
	sub.ftz.f32 	%f196, %f195, %f227;
	mul.ftz.f32 	%f197, %f196, %f231;
	fma.rn.ftz.f32 	%f231, %f227, %f192, %f197;
	sub.ftz.f32 	%f198, %f195, %f228;
	mul.ftz.f32 	%f199, %f198, %f232;
	fma.rn.ftz.f32 	%f232, %f228, %f193, %f199;
	sub.ftz.f32 	%f200, %f195, %f229;
	mul.ftz.f32 	%f201, %f200, %f233;
	fma.rn.ftz.f32 	%f233, %f229, %f194, %f201;

BB0_20:
	mul.ftz.f32 	%f202, %f132, %f231;
	mul.ftz.f32 	%f203, %f132, %f232;
	mul.ftz.f32 	%f204, %f132, %f233;
	selp.f32	%f234, %f231, %f202, %p15;
	selp.f32	%f235, %f232, %f203, %p15;
	selp.f32	%f236, %f233, %f204, %p15;

BB0_21:
	ld.global.u32 	%r19, [%rd1+4];
	setp.eq.s32	%p27, %r19, 0;
	@%p27 bra 	BB0_23;

	ld.shared.v4.f32 	{%f205, %f206, %f207, %f208}, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local];
	mul.ftz.f32 	%f234, %f234, %f205;
	mul.ftz.f32 	%f235, %f235, %f206;
	mul.ftz.f32 	%f236, %f236, %f207;

BB0_23:
	ld.global.u32 	%r20, [%rd1+16];
	setp.eq.s32	%p28, %r20, 0;
	@%p28 bra 	BB0_25;

	ld.shared.v4.f32 	{%f212, %f213, %f214, %f215}, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local+32];
	mul.ftz.f32 	%f217, %f235, %f213;
	fma.rn.ftz.f32 	%f219, %f234, %f212, %f217;
	fma.rn.ftz.f32 	%f221, %f236, %f214, %f219;
	sub.ftz.f32 	%f222, %f234, %f221;
	sub.ftz.f32 	%f223, %f235, %f221;
	sub.ftz.f32 	%f224, %f236, %f221;
	ld.shared.f32 	%f225, [ShaderKernel_PrColorBasicCorrection$__cuda_local_var_180697_593_non_const_p_local+16];
	fma.rn.ftz.f32 	%f234, %f225, %f222, %f221;
	fma.rn.ftz.f32 	%f235, %f225, %f223, %f221;
	fma.rn.ftz.f32 	%f236, %f225, %f224, %f221;

BB0_25:
	mad.lo.s32 	%r29, %r3, %r7, %r2;
	cvt.s64.s32	%rd3, %r29;
	setp.eq.s32	%p29, %r8, 0;
	@%p29 bra 	BB0_27;

	cvta.to.global.u64 	%rd19, %rd4;
	shl.b64 	%rd20, %rd3, 4;
	add.s64 	%rd21, %rd19, %rd20;
	st.global.v4.f32 	[%rd21], {%f236, %f235, %f234, %f84};
	bra.uni 	BB0_28;

BB0_27:
	cvta.to.global.u64 	%rd22, %rd4;
	shl.b64 	%rd23, %rd3, 3;
	add.s64 	%rd24, %rd22, %rd23;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f234;
	mov.b16 	%rs1, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f235;
	mov.b16 	%rs2, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f236;
	mov.b16 	%rs3, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f84;
	mov.b16 	%rs4, %temp;
}
	st.global.v4.u16 	[%rd24], {%rs3, %rs2, %rs1, %rs4};

BB0_28:
	ret;
}


