//
// Generated by NVIDIA NVVM Compiler
// Compiler built on Fri Jul 25 04:36:16 2014 (1406288176)
// Cuda compilation tools, release 6.5, V6.5.13
//

.version 4.1
.target sm_30
.address_size 64

.global .texref texture0_RECT;
.global .texref texture2_2D;
// ShaderKernel_PrColorLookAdjustments$__cuda_local_var_180690_593_non_const_p_local has been demoted

.visible .entry ShaderKernel_PrColorLookAdjustments(
	.param .u64 ShaderKernel_PrColorLookAdjustments_param_0,
	.param .u32 ShaderKernel_PrColorLookAdjustments_param_1,
	.param .u32 ShaderKernel_PrColorLookAdjustments_param_2,
	.param .u32 ShaderKernel_PrColorLookAdjustments_param_3,
	.param .u32 ShaderKernel_PrColorLookAdjustments_param_4,
	.param .u64 ShaderKernel_PrColorLookAdjustments_param_5,
	.param .u64 ShaderKernel_PrColorLookAdjustments_param_6,
	.param .u64 ShaderKernel_PrColorLookAdjustments_param_7,
	.param .u64 ShaderKernel_PrColorLookAdjustments_param_8
)
{
	.reg .pred 	%p<40>;
	.reg .s16 	%rs<5>;
	.reg .s32 	%r<29>;
	.reg .f32 	%f<296>;
	.reg .s64 	%rd<27>;
	// demoted variable
	.shared .align 16 .b8 ShaderKernel_PrColorLookAdjustments$__cuda_local_var_180690_593_non_const_p_local[80];

	ld.param.u64 	%rd3, [ShaderKernel_PrColorLookAdjustments_param_0];
	ld.param.u32 	%r7, [ShaderKernel_PrColorLookAdjustments_param_1];
	ld.param.u32 	%r8, [ShaderKernel_PrColorLookAdjustments_param_2];
	ld.param.u32 	%r9, [ShaderKernel_PrColorLookAdjustments_param_3];
	ld.param.u32 	%r10, [ShaderKernel_PrColorLookAdjustments_param_4];
	ld.param.u64 	%rd4, [ShaderKernel_PrColorLookAdjustments_param_5];
	ld.param.u64 	%rd5, [ShaderKernel_PrColorLookAdjustments_param_8];
	mov.u32 	%r11, %ntid.x;
	mov.u32 	%r12, %ctaid.x;
	mov.u32 	%r1, %tid.x;
	mad.lo.s32 	%r2, %r11, %r12, %r1;
	mov.u32 	%r13, %ntid.y;
	mov.u32 	%r14, %ctaid.y;
	mov.u32 	%r15, %tid.y;
	mad.lo.s32 	%r3, %r13, %r14, %r15;
	setp.lt.s32	%p1, %r2, %r9;
	setp.lt.s32	%p2, %r3, %r10;
	and.pred  	%p3, %p1, %p2;
	@!%p3 bra 	BB0_30;
	bra.uni 	BB0_1;

BB0_1:
	setp.gt.u32	%p4, %r1, 4;
	@%p4 bra 	BB0_3;

	cvta.to.global.u64 	%rd6, %rd4;
	mul.wide.u32 	%rd7, %r1, 16;
	mov.u64 	%rd8, ShaderKernel_PrColorLookAdjustments$__cuda_local_var_180690_593_non_const_p_local;
	add.s64 	%rd9, %rd8, %rd7;
	add.s64 	%rd10, %rd6, %rd7;
	ld.global.v4.f32 	{%f79, %f80, %f81, %f82}, [%rd10];
	st.shared.v4.f32 	[%rd9], {%f79, %f80, %f81, %f82};

BB0_3:
	cvta.to.global.u64 	%rd1, %rd5;
	cvt.rn.f32.s32	%f87, %r2;
	add.ftz.f32 	%f1, %f87, 0f3F000000;
	cvt.rn.f32.s32	%f88, %r3;
	add.ftz.f32 	%f2, %f88, 0f3F000000;
	bar.sync 	0;
	// inline asm
	tex.2d.v4.f32.f32 {%f89, %f90, %f91, %f92}, [texture0_RECT, {%f1, %f2}];
	// inline asm
	cvt.ftz.sat.f32.f32	%f293, %f91;
	cvt.ftz.sat.f32.f32	%f294, %f90;
	cvt.ftz.sat.f32.f32	%f295, %f89;
	sub.ftz.f32 	%f287, %f91, %f293;
	sub.ftz.f32 	%f288, %f90, %f294;
	sub.ftz.f32 	%f289, %f89, %f295;
	ld.global.u32 	%r16, [%rd1+4];
	setp.eq.s32	%p5, %r16, 0;
	@%p5 bra 	BB0_8;

	ld.shared.v4.f32 	{%f95, %f96, %f97, %f98}, [ShaderKernel_PrColorLookAdjustments$__cuda_local_var_180690_593_non_const_p_local+32];
	mul.ftz.f32 	%f100, %f294, %f96;
	fma.rn.ftz.f32 	%f102, %f293, %f95, %f100;
	fma.rn.ftz.f32 	%f13, %f295, %f97, %f102;
	setp.gtu.ftz.f32	%p6, %f13, 0f00000000;
	@%p6 bra 	BB0_6;

	mov.f32 	%f279, 0f3A000000;
	bra.uni 	BB0_7;

BB0_6:
	lg2.approx.ftz.f32 	%f105, %f13;
	mul.ftz.f32 	%f106, %f105, 0f3EE8BA2F;
	ex2.approx.ftz.f32 	%f107, %f106;
	fma.rn.ftz.f32 	%f279, %f107, 0f3F7FF000, 0f3A000000;

BB0_7:
	fma.rn.ftz.f32 	%f113, %f13, 0f00000000, 0f3F400000;
	// inline asm
	tex.2d.v4.f32.f32 {%f108, %f109, %f110, %f111}, [texture2_2D, {%f279, %f113}];
	// inline asm
	fma.rn.ftz.f32 	%f293, %f108, %f293, %f109;
	fma.rn.ftz.f32 	%f294, %f108, %f294, %f109;
	fma.rn.ftz.f32 	%f295, %f108, %f295, %f109;

BB0_8:
	ld.global.u32 	%r4, [%rd1+12];
	ld.global.u32 	%r5, [%rd1+8];
	or.b32  	%r17, %r4, %r5;
	ld.global.u32 	%r6, [%rd1+16];
	or.b32  	%r18, %r17, %r6;
	setp.eq.s32	%p7, %r18, 0;
	setp.lt.ftz.f32	%p8, %f91, 0f00000000;
	selp.f32	%f284, 0fBF800000, 0f3F800000, %p8;
	setp.lt.ftz.f32	%p9, %f90, 0f00000000;
	selp.f32	%f285, 0fBF800000, 0f3F800000, %p9;
	setp.lt.ftz.f32	%p10, %f89, 0f00000000;
	selp.f32	%f286, 0fBF800000, 0f3F800000, %p10;
	@%p7 bra 	BB0_16;

	mov.f32 	%f115, 0f3F800000;
	sub.ftz.f32 	%f116, %f115, %f293;
	selp.f32	%f117, %f116, %f293, %p8;
	fma.rn.ftz.f32 	%f280, %f287, %f117, %f293;
	sub.ftz.f32 	%f118, %f115, %f294;
	selp.f32	%f119, %f118, %f294, %p9;
	fma.rn.ftz.f32 	%f281, %f288, %f119, %f294;
	sub.ftz.f32 	%f120, %f115, %f295;
	selp.f32	%f121, %f120, %f295, %p10;
	fma.rn.ftz.f32 	%f282, %f289, %f121, %f295;
	setp.eq.s32	%p14, %r5, 0;
	@%p14 bra 	BB0_11;

	setp.gt.ftz.f32	%p15, %f280, %f281;
	selp.f32	%f122, %f281, %f280, %p15;
	setp.gt.ftz.f32	%p16, %f122, %f282;
	selp.f32	%f123, %f282, %f122, %p16;
	cvt.ftz.sat.f32.f32	%f124, %f123;
	selp.f32	%f125, %f280, %f281, %p15;
	setp.gt.ftz.f32	%p17, %f125, %f282;
	selp.f32	%f126, %f125, %f282, %p17;
	cvt.ftz.sat.f32.f32	%f127, %f126;
	sub.ftz.f32 	%f128, %f127, %f124;
	setp.gt.ftz.f32	%p18, %f128, 0f2EDBE6FF;
	selp.f32	%f129, %f128, 0f2EDBE6FF, %p18;
	div.rn.ftz.f32 	%f131, %f115, %f129;
	cvt.ftz.sat.f32.f32	%f132, %f282;
	cvt.ftz.sat.f32.f32	%f133, %f281;
	sub.ftz.f32 	%f134, %f133, %f132;
	cvt.ftz.sat.f32.f32	%f135, %f280;
	sub.ftz.f32 	%f136, %f132, %f135;
	sub.ftz.f32 	%f137, %f135, %f133;
	mul.ftz.f32 	%f138, %f131, %f134;
	mul.ftz.f32 	%f139, %f131, %f136;
	mul.ftz.f32 	%f140, %f131, %f137;
	fma.rn.ftz.f32 	%f141, %f138, 0f3E2AAAAB, 0f00000000;
	fma.rn.ftz.f32 	%f142, %f139, 0f3E2AAAAB, 0f3EAAAAAB;
	fma.rn.ftz.f32 	%f143, %f140, 0f3E2AAAAB, 0f3F2AAAAB;
	sub.ftz.f32 	%f144, %f280, %f127;
	sub.ftz.f32 	%f145, %f281, %f127;
	setp.lt.ftz.f32	%p19, %f144, 0f00000000;
	selp.f32	%f146, %f143, %f141, %p19;
	setp.lt.ftz.f32	%p20, %f145, 0f00000000;
	selp.f32	%f147, %f146, %f142, %p20;
	add.ftz.f32 	%f148, %f147, 0f3E2AAAAB;
	cvt.rmi.ftz.f32.f32	%f149, %f148;
	sub.ftz.f32 	%f150, %f148, %f149;
	mul.ftz.f32 	%f151, %f150, 0f40C00000;
	fma.rn.ftz.f32 	%f152, %f151, 0fC0800000, 0f40E00000;
	setp.gt.ftz.f32	%p21, %f152, %f151;
	selp.f32	%f153, %f151, %f152, %p21;
	cvt.ftz.sat.f32.f32	%f154, %f153;
	setp.gt.ftz.f32	%p22, %f127, 0f2EDBE6FF;
	selp.f32	%f155, %f127, 0f2EDBE6FF, %p22;
	div.rn.ftz.f32 	%f156, %f115, %f155;
	mul.ftz.f32 	%f157, %f128, %f156;
	neg.ftz.f32 	%f158, %f157;
	mul.ftz.f32 	%f159, %f157, %f157;
	sub.ftz.f32 	%f160, %f115, %f159;
	mul.ftz.f32 	%f161, %f160, %f154;
	ld.shared.f32 	%f162, [ShaderKernel_PrColorLookAdjustments$__cuda_local_var_180690_593_non_const_p_local];
	mul.ftz.f32 	%f163, %f162, %f161;
	sub.ftz.f32 	%f164, %f163, %f161;
	fma.rn.ftz.f32 	%f165, %f164, %f162, %f162;
	fma.rn.ftz.f32 	%f166, %f161, 0fBECF3CE9, 0f3F555555;
	mul.ftz.f32 	%f167, %f166, %f165;
	mul.ftz.f32 	%f168, %f167, %f124;
	sub.ftz.f32 	%f169, %f167, %f168;
	mul.ftz.f32 	%f170, %f127, 0f41800000;
	cvt.ftz.sat.f32.f32	%f171, %f170;
	fma.rn.ftz.f32 	%f172, %f157, %f158, %f157;
	mov.f32 	%f173, 0f40000000;
	sub.ftz.f32 	%f174, %f173, %f171;
	sub.ftz.f32 	%f175, %f173, %f172;
	mul.ftz.f32 	%f176, %f174, %f171;
	mul.ftz.f32 	%f177, %f175, %f172;
	mul.ftz.f32 	%f178, %f176, %f165;
	mul.ftz.f32 	%f179, %f176, %f169;
	mul.ftz.f32 	%f180, %f178, %f177;
	mul.ftz.f32 	%f181, %f179, %f157;
	sub.ftz.f32 	%f182, %f179, %f181;
	sub.ftz.f32 	%f183, %f115, %f182;
	div.rn.ftz.f32 	%f184, %f115, %f183;
	mul.ftz.f32 	%f185, %f180, %f127;
	sub.ftz.f32 	%f186, %f180, %f185;
	fma.rn.ftz.f32 	%f187, %f186, 0f3E800000, 0f3F800000;
	mul.ftz.f32 	%f188, %f127, %f187;
	mul.ftz.f32 	%f189, %f127, %f184;
	sub.ftz.f32 	%f190, %f188, %f189;
	fma.rn.ftz.f32 	%f280, %f184, %f280, %f190;
	fma.rn.ftz.f32 	%f281, %f184, %f281, %f190;
	fma.rn.ftz.f32 	%f282, %f184, %f282, %f190;
	bra.uni 	BB0_13;

BB0_11:
	setp.eq.s32	%p23, %r4, 0;
	@%p23 bra 	BB0_13;

	setp.gt.ftz.f32	%p24, %f280, %f281;
	selp.f32	%f191, %f281, %f280, %p24;
	setp.gt.ftz.f32	%p25, %f191, %f282;
	selp.f32	%f192, %f282, %f191, %p25;
	cvt.ftz.sat.f32.f32	%f193, %f192;
	selp.f32	%f194, %f280, %f281, %p24;
	setp.gt.ftz.f32	%p26, %f194, %f282;
	selp.f32	%f195, %f194, %f282, %p26;
	cvt.ftz.sat.f32.f32	%f196, %f195;
	sub.ftz.f32 	%f197, %f196, %f193;
	setp.gt.ftz.f32	%p27, %f196, 0f2EDBE6FF;
	selp.f32	%f198, %f196, 0f2EDBE6FF, %p27;
	div.rn.ftz.f32 	%f200, %f115, %f198;
	mul.ftz.f32 	%f201, %f197, %f200;
	mul.ftz.f32 	%f202, %f196, 0f41800000;
	cvt.ftz.sat.f32.f32	%f203, %f202;
	mul.ftz.f32 	%f204, %f201, %f201;
	sub.ftz.f32 	%f205, %f201, %f204;
	mov.f32 	%f206, 0f40000000;
	sub.ftz.f32 	%f207, %f206, %f203;
	sub.ftz.f32 	%f208, %f206, %f205;
	mul.ftz.f32 	%f209, %f207, %f203;
	mul.ftz.f32 	%f210, %f208, %f205;
	ld.shared.f32 	%f211, [ShaderKernel_PrColorLookAdjustments$__cuda_local_var_180690_593_non_const_p_local];
	neg.ftz.f32 	%f212, %f211;
	mul.ftz.f32 	%f213, %f209, %f212;
	mul.ftz.f32 	%f214, %f213, %f210;
	fma.rn.ftz.f32 	%f215, %f201, 0f3F000000, 0f3F000000;
	mul.ftz.f32 	%f216, %f201, %f215;
	fma.rn.ftz.f32 	%f217, %f216, %f213, %f211;
	add.ftz.f32 	%f218, %f217, 0f3F800000;
	fma.rn.ftz.f32 	%f219, %f211, 0f3E800000, 0f3F800000;
	mul.ftz.f32 	%f220, %f219, %f218;
	mul.ftz.f32 	%f221, %f214, %f196;
	sub.ftz.f32 	%f222, %f214, %f221;
	sub.ftz.f32 	%f223, %f115, %f222;
	mul.ftz.f32 	%f224, %f196, %f223;
	mul.ftz.f32 	%f225, %f196, %f220;
	sub.ftz.f32 	%f226, %f224, %f225;
	fma.rn.ftz.f32 	%f280, %f220, %f280, %f226;
	fma.rn.ftz.f32 	%f281, %f220, %f281, %f226;
	fma.rn.ftz.f32 	%f282, %f220, %f282, %f226;

BB0_13:
	setp.eq.s32	%p28, %r6, 0;
	@%p28 bra 	BB0_15;

	ld.shared.v4.f32 	{%f228, %f229, %f230, %f231}, [ShaderKernel_PrColorLookAdjustments$__cuda_local_var_180690_593_non_const_p_local+32];
	mul.ftz.f32 	%f233, %f281, %f229;
	fma.rn.ftz.f32 	%f235, %f280, %f228, %f233;
	fma.rn.ftz.f32 	%f237, %f282, %f230, %f235;
	sub.ftz.f32 	%f238, %f280, %f237;
	sub.ftz.f32 	%f239, %f281, %f237;
	sub.ftz.f32 	%f240, %f282, %f237;
	sub.ftz.f32 	%f283, %f92, %f237;
	ld.shared.f32 	%f241, [ShaderKernel_PrColorLookAdjustments$__cuda_local_var_180690_593_non_const_p_local+16];
	fma.rn.ftz.f32 	%f280, %f241, %f238, %f237;
	fma.rn.ftz.f32 	%f281, %f241, %f239, %f237;
	fma.rn.ftz.f32 	%f282, %f241, %f240, %f237;

BB0_15:
	setp.lt.ftz.f32	%p29, %f280, 0f00000000;
	selp.f32	%f284, 0fBF800000, 0f3F800000, %p29;
	setp.lt.ftz.f32	%p30, %f281, 0f00000000;
	selp.f32	%f285, 0fBF800000, 0f3F800000, %p30;
	setp.lt.ftz.f32	%p31, %f282, 0f00000000;
	selp.f32	%f286, 0fBF800000, 0f3F800000, %p31;
	cvt.ftz.sat.f32.f32	%f293, %f280;
	sub.ftz.f32 	%f287, %f280, %f293;
	cvt.ftz.sat.f32.f32	%f294, %f281;
	sub.ftz.f32 	%f288, %f281, %f294;
	cvt.ftz.sat.f32.f32	%f295, %f282;
	sub.ftz.f32 	%f289, %f282, %f295;

BB0_16:
	ld.global.u32 	%r19, [%rd1];
	setp.eq.s32	%p32, %r19, 0;
	@%p32 bra 	BB0_27;

	setp.gtu.ftz.f32	%p33, %f293, 0f00000000;
	@%p33 bra 	BB0_19;

	mov.f32 	%f290, 0f3A000000;
	bra.uni 	BB0_20;

BB0_19:
	lg2.approx.ftz.f32 	%f243, %f293;
	mul.ftz.f32 	%f244, %f243, 0f3EE8BA2F;
	ex2.approx.ftz.f32 	%f245, %f244;
	fma.rn.ftz.f32 	%f290, %f245, 0f3F7FF000, 0f3A000000;

BB0_20:
	setp.gtu.ftz.f32	%p34, %f294, 0f00000000;
	@%p34 bra 	BB0_22;

	mov.f32 	%f291, 0f3A000000;
	bra.uni 	BB0_23;

BB0_22:
	lg2.approx.ftz.f32 	%f247, %f294;
	mul.ftz.f32 	%f248, %f247, 0f3EE8BA2F;
	ex2.approx.ftz.f32 	%f249, %f248;
	fma.rn.ftz.f32 	%f291, %f249, 0f3F7FF000, 0f3A000000;

BB0_23:
	setp.gtu.ftz.f32	%p35, %f295, 0f00000000;
	@%p35 bra 	BB0_25;

	mov.f32 	%f292, 0f3A000000;
	bra.uni 	BB0_26;

BB0_25:
	lg2.approx.ftz.f32 	%f251, %f295;
	mul.ftz.f32 	%f252, %f251, 0f3EE8BA2F;
	ex2.approx.ftz.f32 	%f253, %f252;
	fma.rn.ftz.f32 	%f292, %f253, 0f3F7FF000, 0f3A000000;

BB0_26:
	fma.rn.ftz.f32 	%f259, %f283, 0f00000000, 0f3E800000;
	// inline asm
	tex.2d.v4.f32.f32 {%f254, %f255, %f256, %f257}, [texture2_2D, {%f290, %f259}];
	// inline asm
	// inline asm
	tex.2d.v4.f32.f32 {%f260, %f261, %f262, %f263}, [texture2_2D, {%f291, %f259}];
	// inline asm
	// inline asm
	tex.2d.v4.f32.f32 {%f266, %f267, %f268, %f269}, [texture2_2D, {%f292, %f259}];
	// inline asm
	mov.f32 	%f295, %f268;
	mov.f32 	%f294, %f261;
	mov.f32 	%f293, %f254;

BB0_27:
	setp.lt.ftz.f32	%p36, %f284, 0f00000000;
	mov.f32 	%f272, 0f3F800000;
	sub.ftz.f32 	%f273, %f272, %f293;
	selp.f32	%f274, %f273, %f293, %p36;
	fma.rn.ftz.f32 	%f76, %f287, %f274, %f293;
	setp.lt.ftz.f32	%p37, %f285, 0f00000000;
	sub.ftz.f32 	%f275, %f272, %f294;
	selp.f32	%f276, %f275, %f294, %p37;
	fma.rn.ftz.f32 	%f77, %f288, %f276, %f294;
	setp.lt.ftz.f32	%p38, %f286, 0f00000000;
	sub.ftz.f32 	%f277, %f272, %f295;
	selp.f32	%f278, %f277, %f295, %p38;
	fma.rn.ftz.f32 	%f78, %f289, %f278, %f295;
	mad.lo.s32 	%r28, %r3, %r7, %r2;
	cvt.s64.s32	%rd2, %r28;
	setp.eq.s32	%p39, %r8, 0;
	@%p39 bra 	BB0_29;

	cvta.to.global.u64 	%rd21, %rd3;
	shl.b64 	%rd22, %rd2, 4;
	add.s64 	%rd23, %rd21, %rd22;
	st.global.v4.f32 	[%rd23], {%f78, %f77, %f76, %f92};
	bra.uni 	BB0_30;

BB0_29:
	cvta.to.global.u64 	%rd24, %rd3;
	shl.b64 	%rd25, %rd2, 3;
	add.s64 	%rd26, %rd24, %rd25;
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f76;
	mov.b16 	%rs1, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f77;
	mov.b16 	%rs2, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f78;
	mov.b16 	%rs3, %temp;
}
	{
	.reg .b16 %temp;
	cvt.rn.ftz.f16.f32 	%temp, %f92;
	mov.b16 	%rs4, %temp;
}
	st.global.v4.u16 	[%rd26], {%rs3, %rs2, %rs1, %rs4};

BB0_30:
	ret;
}


